Integrated circuits grow increasingly complex and the associated manufacturing processes are more complicated. The complications result in lower yield and higher cost for IC devices. New IC designs are reduced in size and yet the number of elements in a given chip is increased. The increasing complexity requires an increased number of connections between elements as well.
During normal IC manufacturing processes, various layers of semiconductor material, metals, insulators, and other materials are deposited, patterned, and/or etched to create electronic circuitry between circuit elements. The circuit connections may be horizontal or vertical, considered in relation to the plane of the underlying substrate, or chip. Vertical connections, called vias, may connect two metal layers, one metal layer and a semiconductor layer, or other combinations. In comparison to horizontal connections, vias tend to be very small and, therefore, more prone to failure if there are any defects or irregularities in a manufacturing process.
A faulty via may interrupt or change the flow of electricity in the circuitry of an IC device. In particular, a faulty via may not fail upon completion of the circuit, but only after degrading over time in use. An IC device may pass any quality control checks during the manufacturing process and still fail prematurely. U.S. Pat. Nos. 7,919,973 and 8,878,183 describe a so-called contact/via test vehicle which facilitates a monitoring process in the semiconductor fabrication of integrated circuits, whose products may encompass a myriad application in various technical fields. These two patents are hereby incorporated by reference in their entirety.